The present invention relates to a technique to sophisticate a semiconductor integrated circuit device, and in particular, to a technique effective for improvement in transmission speed in a semiconductor integrated circuit device including power source regions supplied with a plurality of power source voltages.
Of late years cellular phones have been popularized as one of means of mobile communications, of which functions have required to be diverse. For example, there are very strong demands for low power consuming semiconductor integrated circuit devices used in cellular phones.
It has been known that low power consumption techniques used in semiconductor integrated circuit devices include one in which, for example, core power source regions supplied with different voltage levels are divided and power is ON/OFF controlled for each divided region.
A power switch is provided for each core power source region. The power switches are provided so as to surround the core power source regions and are connected between each core power source region and reference potential VSS.
The power switch connects an arbitrary core power source region to reference potential VSS and disconnects an arbitrary core power source region from reference potential VSS on the basis of a control signal to turn on/off power supply.
When signals are transmitted to or received from different core power source regions, a repeating buffer, so-called repeater is provided to repeat wires long in length, preventing electrical signal characteristics from being deteriorated.
Power source technique of this type in a repeating buffer for repeating signals between core power source regions includes one in which, for example, another power except for power supplied for a buffer-inserted block is supplied for the signal repeating buffer to realize power control for each layout block while securing power supply to an inter-block signal repeating buffer (refer to Patent Document 1).
(Patent Document 1): Japanese Unexamined Patent Publication No. 2003-78009